SC Conference - Activity Details

Lakshminarayanan Renganarayana  (IBM T.J. Watson Research Center)

Sanjay Rajopadhye  (Colorado State University)

System Performance Optimization

Thursday,  03:30PM - 04:00PM

Room Ballroom F

Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is usually achieved by developing cost models that characterize the performance of the tiled program as a function of tile sizes. All previous approaches to tile size selection (TSS) are cost model specific. Due to this they are neither extensible (e.g., to richer program classes/newer architectures) nor scalable (e.g., to multiple levels of tiling). This paper identifies positivity as a fundamental property shared by the functions and parameters commonly used in TSS models. We show how this positivity can be used as a basis to derive a TSS framework which is both efficient and scalable. We also show that almost all TSS models proposed in the literature (including those used in production compilers and auto-tuners) can be reduced to our framework.

The full paper can be found in the IEEE Xplore Digital Library and ACM Digital Library