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SC Conference - Activity Details



Power Efficiency and the Path to Exascale Computing

Details...

Organizers:
John Shalf  (Lawrence Berkeley National Laboratory)
Stephen Elbert  (Pacific Northwest National Laboratory)
Thomas Sterling  (Louisiana State University)
Workshops Session
Sunday,  08:30AM - 05:00PM
Room 16A/16B
Abstract:
Over the past forty years, progress in supercomputing has tracked progress in integrated circuit scaling and this has resulted in exponential improvements in system-level performance. However, changes in device physics now seriously threaten further sustained progress toward Exaflop HPC systems. This workshop will begin with a summary of a recent DARPA study highlighting issues associated with Exaflop computing architecture. This will be followed by a series of invited talks covering a wide range of approaches to mitigating the Exaflop computing roadblocks, including novel computer architectures, power-aware algorithm design, power efficiency metrics, and power efficient facility design.
   IEEE Computer Society  /  ACM     2 0   Y E A R S   -   U N L E A S H I N G   T H E   P O W E R   O F   H P C