Introductory: 25% Intermediate: 50% Advanced: 25%

SC Conference - Activity Details

M02: High Performance Computing with CUDA

Massimiliano Fatica  (NVIDIA)
Patrick LeGresley  (NVIDIA)
Ian Buck  (NVIDIA)
John Stone  (University of Illinois at Urbana-Champaign)
Jim Phillips  (University of Illinois at Urbana-Champaign)
Scott Morton  (Hess Corporation)
Paulius Micikevicius  (NVIDIA)
Tutorials Session
Monday,  08:30AM - 05:00PM
Room TBD
NVIDIA's CUDA is a general purpose scalable parallel programming model for writing highly parallel applications. It provides several key abstractions--a hierarchy of thread blocks, shared memory, and barrier synchronization. This model has proven quite successful at programming multithreaded manycore GPUs and scales transparently to hundreds of cores: scientists throughout industry and academia are already using CUDA to achieve dramatic speedups on production and research codes. A new compiler backend extends CUDA to multicore CPUs. In this tutorial NVIDIA engineers will partner with academic and industrial researchers to present CUDA and discuss its advanced use for science and engineering domains. The morning session will introduce CUDA programming and the execution and memory models, motivate the use of CUDA with many brief examples from different HPC domains. The afternoon will discuss advanced issues and include real-world case studies from domain scientists using CUDA for computational biology, computational fluid dynamics and seismic imaging.
   IEEE Computer Society  /  ACM     2 0   Y E A R S   -   U N L E A S H I N G   T H E   P O W E R   O F   H P C