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SC Conference - Activity Details



QPACE: QCD Parallel Computing on Cell/BE

Authors:
Heiko Joerg Schick  (IBM Deutschland Research & Development GmbH)
Uwe Fischer  (IBM Deutschland Research & Development GmbH)
Dirk Pleiter  (Deutsches Elektronen-Synchrotron)
Tilo Wettig  (University of Regensburg)
Thomas Lippert  (Juelich Supercomputing Centre)
Posters Session
Tuesday,  05:15PM - 07:00PM
Room Rotunda Lobby
Abstract:
The poster gives an overview of the QPACE project, which is pursuing the development of a massively parallel, scalable supercomputer for applications in lattice quantum chromodynamics (QCD). The machine will be a three-dimensional torus of identical processing nodes, based on the PowerXCell 8i processor. These nodes will be tightly coupled by an FPGA-based, application-optimized network processor attached to the PowerXCell 8i processor. We first present a performance analysis of lattice QCD code on QPACE and corresponding hardware benchmarks. We then describe the architecture of QPACE in some detail. In particular, we discuss the challenges arising from the special multi-core nature of the PowerXCell 8i processor and from the use of a Xilinx FPGA for the network processor.
   IEEE Computer Society  /  ACM     2 0   Y E A R S   -   U N L E A S H I N G   T H E   P O W E R   O F   H P C