SC Conference - Activity Details
Entering the Petaflop Era: The Architecture and Performance of Roadrunner
Authors:| Kevin Barker (Los Alamos National Laboratory) |
| Kei Davis (Los Alamos National Laboratory) |
| Adolfy Hoisie (Los Alamos National Laboratory) |
| Darren Kerbyson (Los Alamos National Laboratory) |
| Michael Lang (Los Alamos National Laboratory) |
| Scott Pakin (Los Alamos National Laboratory) |
| Jose Carlos Sancho (Los Alamos National Laboratory) |
| HPC Systems |
| Tuesday, 10:30AM - 11:00AM |
| Room Ballroom F |
Roadrunner is a 1.375 Pflop/s-peak hybrid-architecture system, developed by LANL and IBM. It contains 12,240 IBM PowerXCell 8i processors and 12,240 AMD Opteron cores. Roadrunner is the first supercomputer to run Linpack at a sustained speed in excess of 1 Pflop/s. In this paper we present a detailed architectural description of Roadrunner followed by a detailed performance analysis of the system. A case study of optimizing an MPI-based application Sweep3D to exploit Roadrunner's hybrid architecture is also included. The performance of Sweep3D is compared with that of the code on a previous implementation of the Cell (CBE) and on multi-core processors. Using validated performance models combined with Roadrunner-specific microbenchmarks we determine the current performance bottlenecks in the system software that affect the application's performance and infer how well the final Roadrunner configuration will perform once these bottlenecks are removed.
The full paper can be found in the
IEEE Xplore Digital Library
and
ACM Digital Library
| IEEE Computer Society / ACM | 2 0 Y E A R S - U N L E A S H I N G T H E P O W E R O F H P C |